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| Low Capacitance TVS Diode Array For Multi-mode Transceiver Protection PROTECTION PRODUCTS Description The LCDAxxC-8 has been specifically designed to protect sensitive components which are connected to data and transmission lines from over voltages caused by electrostatic discharge (ESD), electrical fast transients (EFT), and lightning. The low capacitance array configuration of the LCDAxxC-8 allows the user to protect eight high-speed data or I/O lines. They may be used on systems operating from 5 to 15 Volts. The high surge capability (500W, tp=8/20s) makes the LCDAxxC-8 suitable for telecommunications systems operating in harsh transient environments. The low inductance construction minimizes voltage overshoot during high current surges. The features of the LCDAxxC-8 are ideal for protecting multi-protocol transceivers in WAN applications such as Frame Relay systems, routers, and switches. LCDA12C-8 and LCDA15C-8 Features Transient protection for high-speed data lines to IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact) IEC 61000-4-4 (EFT) 40A (5/50ns) IEC 61000-4-5 (Lightning) 0.5kV, 12A (8/20s) Protects eight I/O lines Low capacitance for high-speed interfaces High surge capability Low clamping voltage Solid-state silicon avalanche technology Mechanical Characteristics JEDEC SO-16 package Molding compound flammability rating: UL 94V-0 Marking : Part number, date code, logo Packaging : Tape and Reel per EIA 481 Applications Multi-Mode Transceiver Protection WAN Equipment: CSU/DSU Multiplexers Routers ISP Equipment Customer Premise Equipment Protection for any of the following interfaces: RS-232 (V.28) RS-422 (V.11, X.21) RS-449 (V.11/V.10) Circuit Diagram Schematic & PIN Configuration Pin 1 Pin 16 SO-16 (Top View) Revision 02/18/05 1 www.semtech.com LCDA12C-8 and LCDA15C-8 PROTECTION PRODUCTS Absolute Maximum Rating R ating Peak Pulse Power (tp = 8/20s) Lead Soldering Temperature Operating Temperature Storage Temperature Symbol Pp k TL TJ TSTG Value 500 260 (10 sec.) -55 to +125 -55 to +150 Units Watts C C C Electrical Characteristics LCDA12C-8 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamp ing Voltage Clamp ing Voltage Peak Pulse Current Junction Cap acitance Symbol VRWM V BR IR VC VC IP P Cj It = 1mA VRWM = 12V, T=25C IPP = 5A, tp = 8/20s IPP = 20A, tp = 8/20s tp = 8/20s Between I/O p ins and Ground VR = 0V, f = 1MHz 8 13.3 5 19 26.6 20 15 Conditions Minimum Typical Maximum 12 Units V V A V V A pF LCDA15C-8 Parameter Reverse Stand-Off Voltage Reverse Breakdown Voltage Reverse Leakage Current Clamp ing Voltage Clamp ing Voltage Peak Pulse Current Junction Cap acitance Symbol VRWM V BR IR VC VC IP P Cj It = 1mA VRWM = 15V, T=25C IPP = 1A, tp = 8/20s IPP = 15A, tp = 8/20s tp = 8/20s Between I/O p ins and Ground VR = 0V, f = 1MHz 2 Conditions Minimum Typical Maximum 15 Units V V 16.7 5 24 33 15 8 15 A V V A pF 2005 Semtech Corp. www.semtech.com LCDA12C-8 and LCDA15C-8 PROTECTION PRODUCTS Typical Characteristics Non-Repetitive Peak Pulse Power vs. Pulse Time 10 Peak Pulse Power - Ppk (kW) Power Derating Curve 110 100 90 % of Rated Power or I PP 80 70 60 50 40 30 20 10 1 0.1 0.01 0.1 1 10 Pulse Duration - tp (s) 100 1000 0 0 25 50 75 100 125 150 175 Ambient Temperature - TA (oC) Pulse Waveform 110 100 90 80 Percent of IPP 70 60 50 40 30 20 10 0 0 5 10 15 T im e (s) 20 25 30 td = I PP /2 e -t Clamping Voltage vs. Peak Pulse Current 28 W aveform Parameters: tr = 8s td = 20s 26 Clamping Voltage - VC (V) 24 22 20 18 16 14 12 10 0 5 10 15 20 25 Peak Pulse Current - IPP (A) LCDA12C-8 Waveform Parameters: tr = 8s td = 20s LCDA15C-8 LCDA12C-8 Capacitance vs. Reverse Voltage 12 10 Capacitance - Cj (pF) 8 6 4 2 0 0 2 4 6 8 10 Reverse Voltage - VR (V) f = 1MHz LCDA15C-8 Capacitance vs. Reverse Voltage 6 5 Capacitance - Cj (pF) 4 3 2 1 f = 1MHz 0 12 0 2 4 6 8 10 12 14 Reverse Voltage - VR (V) 2005 Semtech Corp. 3 www.semtech.com LCDA12C-8 and LCDA15C-8 PROTECTION PRODUCTS Applications Information Device Connection Options for Protection of Eight High-Speed Data Lines The LCDAxxC-8 may be configured to protect up to eight I/O lines operating between 5 and 15V. It may be used to protect the most popular serial data interface standard lines making it ideal for use in equipment utilizing multi-mode transceivers. The LCDAxxC-8 is symmetrical so the data lines may be connected at pins 1-8 or 9-16. Pins 9-16 or 1-8 are connected to ground as shown. For best results, these pins should be connected directly to a ground plane on the board. The path length should be kept as short as possible to minimize parasitic inductance. Multi-Mode Transceiver Protection The LCDAxxC-8 may be used to protect multi-mode transceiver I/O lines with external connections. The LCDAxxC-8 adds a maximum loading capacitance of 15pF with a working voltage of 12V or 15V. This allows the transceiver to safely operate in all modes without clipping or degradation of the signal. With proper design and layout, the transceiver port can be protected to >15kV (HBM per IEC 61000-4-2). Circuit Board Layout Recommendations for Suppression of ESD. Good circuit board layout is critical for the suppression of fast rise-time transients such as ESD. The following guidelines are recommended: Place the LCDAxxC-8 near the input terminals or connectors to restrict transient coupling. Minimize the path length between the LCDAxxC-8 and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Never run critical signals near board edges. Use ground planes whenever possible. Matte Tin Lead Finish Matte tin has become the industry standard lead-free replacement for SnPb lead finishes. A matte tin finish is composed of 100% tin solder with large grains. Since the solder volume on the leads is small compared to the solder paste volume that is placed on the land pattern of the PCB, the reflow profile will be determined by the requirements of the solder paste. Therefore, these devices are compatible with both lead-free and SnPb assembly techniques. In addition, unlike other lead-free compositions, matte tin does not have any added alloys that can cause degradation of the solder joint. Device Connection 2005 Semtech Corp. 4 www.semtech.com LCDA12C-8 and LCDA15C-8 PROTECTION PRODUCTS Outline Drawing - SO-16 h A N 2X E/2 E1 E e D H GAGE PLANE 0.25 1 2 3 e/2 B D aaa C A2 A SEATING PLANE C bxN bbb NOTES: 1. CONTROLLING DIMENSIONS ARE IN MILLIMETERS (ANGLES IN DEGREES). 2. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H3. DIMENSIONS "E1" AND "D" DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. 4. REFERENCE JEDEC STD MS-012, VARIATION AC. h DIMENSIONS INCHES MILLIMETERS DIM MIN NOM MAX MIN NOM MAX A A1 A2 b c D E1 E e h L L1 N 01 aaa bbb ccc .053 .069 .004 .010 .049 .065 .012 .020 .007 .010 .386 .390 .394 .150 .154 .157 .236 BSC .050 BSC .010 .020 .016 .028 .041 (.041) 16 0 8 .004 .010 .008 c L (L1) DETAIL 01 ccc C 2X N/2 TIPS A SIDE VIEW SEE DETAIL A 1.35 1.75 0.10 0.25 1.25 1.65 0.31 0.51 0.17 0.25 9.80 9.90 10.00 3.80 3.90 4.00 6.00 BSC 1.27 BSC 0.25 0.50 0.40 0.72 1.04 (1.04) 16 0 8 0.10 0.25 0.20 A1 C A-B D Land Pattern - SO-16 X DIM (C) G Z C G P X Y Z DIMENSIONS INCHES MILLIMETERS (.205) .118 .050 .024 .087 .291 (5.20) 3.00 1.27 0.60 2.20 7.40 Y P NOTES: 1. THIS LAND PATTERN IS FOR REFERENCE PURPOSES ONLY. CONSULT YOUR MANUFACTURING GROUP TO ENSURE YOUR COMPANY'S MANUFACTURING GUIDELINES ARE MET. REFERENCE IPC-SM-782A, RLP NO. 304A. 2. 2005 Semtech Corp. 5 www.semtech.com LCDA12C-8 and LCDA15C-8 PROTECTION PRODUCTS Ordering Information Part Number LCDA12C-8.TB LCDA15C-8.TB LCDA12C-8.TBT LCDA15C-8.TBT LCDA12C-8 LCDA15C-8 LCDA12C-8.T LCDA15C-8.T Lead Finish SnPb SnPb Pb Free Pb Free SnPb SnPb Pb Free Pb Free Qty per Reel 500 500 500 500 48/Tube 48/Tube 48/Tube 48/Tube R eel Size 7 Inch 7 Inch 7 Inch 7 Inch N /A N /A N /A N /A Contact Information Semtech Corporation Protection Products Division 200 Flynn Road, Camarillo, CA 93012 Phone: (805)498-2111 FAX (805)498-3804 2005 Semtech Corp. 6 www.semtech.com |
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